A Graphene-based Hot Electron Transistor

We experimentally demonstrate DC functionality of graphene-based hot electron transistors, which we call Graphene Base Transistors (GBT). The fabrication scheme is potentially compatible with silicon technology and can be carried out at the wafer scale with standard silicon technology. The state of the GBTs can be switched by a potential applied to the transistor base, which is made of graphene. Transfer characteristics of the GBTs show ON/OFF current ratios exceeding 50.000.Comment: 18 pages, 6 figure

Thermal Transport Across Graphene Step Junctions

Step junctions are often present in layered materials, i.e. where single-layer regions meet multi-layer regions, yet their effect on thermal transport is not understood to date. Here, we measure heat flow across graphene junctions (GJs) from monolayer to bilayer graphene, as well as bilayer to four-layer graphene for the first time, in both heat flow directions. The thermal conductance of the monolayer-bilayer GJ device ranges from ~0.5 to 9.1x10^8 Wm-2K-1 between 50 K to 300 K. Atomistic simulations of such GJ device reveal that graphene layers are relatively decoupled, and the low thermal conductance of the device is determined by the resistance between the two dis-tinct graphene layers. In these conditions the junction plays a negligible effect. To prove that the decoupling between layers controls thermal transport in the junction, the heat flow in both directions was measured, showing no evidence of thermal asymmetry or rectification (within experimental error bars). For large-area graphene applications, this signifies that small bilayer (or multilayer) islands have little or no contribution to overall thermal transport

A Simple Route towards High-Concentration Surfactant-Free Graphene Dispersions

A simple solvent exchange method is introduced to prepare high-concentration and surfactant-free graphene liquid dispersion. Natural graphite flakes are first exfoliated into graphene in dimethylformamide (DMF). DMF is then exchanged by terpineol through distillation, relying on their large difference in boiling points. Graphene can then be concentrated thanks to the volume difference between DMF and terpineol. The concentrated graphene dispersions are used to fabricate transparent conductive thin films, which possess comparable properties to those prepared by more complex methods.Comment: 9 pages, 3 figure

RF performance projections of graphene FETs vs. silicon MOSFETs

A graphene field-effect-transistor (GFET) model calibrated with extracted device parameters and a commercial 65 nm silicon MOSFET model are compared with respect to their radio frequency behavior. GFETs slightly lag behind CMOS in terms of speed despite their higher mobility. This is counterintuitive, but can be explained by the effect of a strongly nonlinear voltage-dependent gate capacitance. GFETs achieve their maximum performance only for narrow ranges of VDS and IDS, which must be carefully considered for circuit design. For our parameter set, GFETs require at least μ = 3000 cm2 V−1 s−1 to achieve the same performance as 65 nm silicon MOSFETs.Peer ReviewedPreprin

Electron Transport across Vertical Silicon/MoS2/Graphene Heterostructures: Towards Efficient Emitter Diodes for Graphene Base Hot Electron Transistors

Heterostructures comprising silicon, molybdenum disulfide (MoS2), and graphene are investigated with respect to the vertical current conduction mechanism. The measured current-voltage (I-V) characteristics exhibit temperature-dependent asymmetric current, indicating thermally activated charge carrier transport. The data are compared and fitted to a current transport model that confirms thermionic emission as the responsible transport mechanism across devices. Theoretical calculations in combination with the experimental data suggest that the heterojunction barrier from Si to MoS2 is linearly temperature-dependent for T = 200-300 K with a positive temperature coefficient. The temperature dependence may be attributed to a change in band gap difference between Si and MoS2, strain at the Si/MoS2 interface, or different electron effective masses in Si and MoS2, leading to a possible entropy change stemming from variation in density of states as electrons move from Si to MoS2. The low barrier formed between Si and MoS2 and the resultant thermionic emission demonstrated here make the present devices potential candidates as the emitter diode of graphene base hot electron transistors for future high-speed electronics. Copyright © 2020 American Chemical Society

Electron Transport across Vertical Silicon/MoS2/Graphene Heterostructures: Towards Efficient Emitter Diodes for Graphene Base Hot Electron Transistors

Heterostructures comprising silicon, molybdenum disulfide (MoS2), and graphene are investigated with respect to the vertical current conduction mechanism. The measured current-voltage (I-V) characteristics exhibit temperature-dependent asymmetric current, indicating thermally activated charge carrier transport. The data are compared and fitted to a current transport model that confirms thermionic emission as the responsible transport mechanism across devices. Theoretical calculations in combination with the experimental data suggest that the heterojunction barrier from Si to MoS2 is linearly temperature-dependent for T = 200-300 K with a positive temperature coefficient. The temperature dependence may be attributed to a change in band gap difference between Si and MoS2, strain at the Si/MoS2 interface, or different electron effective masses in Si and MoS2, leading to a possible entropy change stemming from variation in density of states as electrons move from Si to MoS2. The low barrier formed between Si and MoS2 and the resultant thermionic emission demonstrated here make the present devices potential candidates as the emitter diode of graphene base hot electron transistors for future high-speed electronics. Copyright © 2020 American Chemical Society

Bilayer Insulator Tunnel Barriers for Graphene-Based Vertical Hot-electron Transistors

Vertical graphene-based device concepts that rely on quantum mechanical tunneling are intensely being discussed in literature for applications in electronics and optoelectronics. In this work, the carrier transport mechanisms in semiconductor-insulator-graphene (SIG) capacitors are investigated with respect to their suitability as the electron emitter in vertical graphene base transistors (GBTs). Several dielectric materials as tunnel barriers are compared, including dielectric double layers. Using bilayer dielectrics, we experimentally demonstrate significant improvements in the electron injection current by promoting Fowler-Nordheim tunneling (FNT) and step tunneling (ST) while suppressing defect mediated carrier transports. High injected tunneling current densities approaching 10$^3$ A/cm$^2$ (limited by series resistance), and excellent current-voltage nonlinearity and asymmetry are achieved using a 1 nm-thick high quality dielectric, thulium silicate (TmSiO), as the first insulator layer, and titanium dioxide (TiO$_2$) as a high electron affinity second layer insulator. We also confirm the feasibility and effectiveness of our approach in a full GBT structure which shows dramatic improvement in the collector on-state current density with respect to the previously reported GBTs. The device design and the fabrication scheme have been selected with future CMOS process compatibility in mind. This work proposes a bilayer tunnel barrier approach as a promising candidate to be used in high performance vertical graphene-based tunneling devices